NVIDIA published its first MLPerf Inference v6.1 preview submission on September 16, 2026. The company reported that Vera Rubin NVL72 achieved up to 3.7x higher throughput than GB300 NVL72 on Qwen3-VL across offline, server and interactive scenarios, and up to 2.5x higher throughput on DeepSeek-R1 against the same GB300 NVL72 baseline.

The results are useful as a reference point for rack-scale inference planning, but they are not a universal forecast for customer workloads. The figures come from NVIDIA’s vendor submission in MLPerf’s closed division and depend on the selected hardware, software stack and benchmark conditions.

The Software Stack Is Part of the Result

The preview uses different runtimes for the two workloads:

  • Qwen3-VL: NVIDIA paired vLLM with the NVIDIA Dynamo inference framework.
  • DeepSeek-R1: NVIDIA used TensorRT-LLM.

NVIDIA attributes the gains to full-stack changes including updated Tensor Cores, the Transformer Engine, NVFP4 precision, disaggregated serving, expert parallelism and sixth-generation NVLink and NVLink Switch fabrics. Those details matter because the reported multiples describe a tuned hardware-and-software configuration, not a chip-only comparison.

What the Submission Does and Does Not Establish

The results correspond to MLPerf entries 6.1-0106 and 6.1-0074. NVIDIA also reported that a 288-GPU GB300 NVL72 submission spanning four racks reached 99% offline scaling efficiency against a single-rack baseline, and that software optimizations in the v6.1 cycle delivered up to 1.6x higher performance than v6.0 on identical tasks.

NVIDIA separately cited a 30x internal preview result on the SemiAnalysis AgentX benchmark. That figure is a vendor-reported claim outside the formal MLPerf results and should not be treated as an independently verified MLCommons measurement.

The throughput multiples also do not translate directly into a matching reduction in cost per token. Total cost depends on system pricing, power and cooling, software costs and utilization. NVIDIA has not published general customer pricing or a shipping timetable for Vera Rubin NVL72 in the cited material.

For inference teams, the practical signal is architectural: reaching the upper end of these results will require rack-wide interconnects, low-precision execution and serving frameworks that are tuned for the system topology.